IIT Delhi Develops India's Ist Indigenously Designed Micro‑GPU

IIT Delhi has achieved a major milestone by developing India’s first indigenously designed micro‑GPU, a compact programmable graphics processor aimed at affordable embedded systems such as e‑rickshaw dashboards, industrial displays, and educational devices. This breakthrough reduces India’s dependence on imported GPUs and opens pathways for indigenous chip design.

Notably, the key difference between a GPU and a micro-GPU is that a conventional GPU is a high‑performance graphics processor designed for intensive parallel workloads like gaming, AI, and scientific computing, while a micro‑GPU is a compact, low‑power version optimized for basic graphics tasks in embedded systems.

GPUs dominate in AI, gaming, and scientific computing, but they are costly and power‑hungry. While, micro‑GPUs fill the gap for low‑cost, socially useful devices, enabling India’s push for indigenous chip design and reducing import dependence. IIT Delhi’s prototype micro‑GPU shows how embedded systems can benefit from programmable graphics without needing full‑scale GPUs

Key Highlights

• Developed by: IIT Delhi’s Electrical Engineering Department, led by Prof. Jayadeva, Prof. Kaushik Saha, and M.Tech students Nammi Akash and M. Ravi Teja.
• Platform: Demonstrated on a Spartan‑7 FPGA using a custom floating‑point GPU engine written in Register Transfer Language (RTL).
• Significance: First working, demonstrable indigenous micro‑GPU from an Indian university.
• Applications: Industrial control displays, Human‑machine interfaces, E‑rickshaw dashboards, Fishing boat navigation terminals, Educational e‑book readers.

Technical Details

Feature	Details
Architecture	Scalable, programmable graphics processor IP
Implementation	RTL mapped to Spartan‑7 FPGA
Future Roadmap	8–16 core vector‑style GPU with optimized compiler & toolchain
ASIC Migration	Planned proof‑of‑concept at 65nm process node for economic viability
Goal	Affordable, socially useful computing platforms bridging the digital divide

Why It Matters for India

• Reduces import dependence: Currently, all GPUs used in India are imported.
• Supports indigenous hardware ecosystem: Aligns with India’s semiconductor mission and DLI program.
• Educational impact: Provides a platform for students and researchers to experiment with programmable graphics hardware.
• Economic viability: Mature nodes like 65nm can make indigenous GPUs cost‑effective for mass deployment.

Possible Challenges & Trade‑offs

• Performance limitations: Micro‑GPUs are not designed for high‑end AI/ML workloads; they target basic graphics needs.
• Scalability risks: Moving from FPGA prototypes to ASIC chips requires significant funding and industry collaboration.
• Global competition: India must compete with established GPU giants like NVIDIA and AMD, who dominate advanced GPU markets.

India’s indigenous GPU ecosystem is accelerating — beyond IIT Delhi’s micro‑GPU, the government and academia are driving multiple initiatives under the IndiaAI Mission and Semicon India Programme to expand domestic GPU design, manufacturing, and compute capacity.

Government announced addition of 20,000 GPUs to India’s compute infrastructure in February 2026.Builds on existing 38,000 GPUs made available at subsidized rates (₹65/hour) for startups, academia, and public institutions.The government aims to democratize access to high‑end compute for AI research and innovation.

Aheesa Unveils Vihaan‑I, India’s First Indigenous Broadband Chip, at Semicon India 2026 with Union Minister Ashwini Vaishnaw

Backed by the Ministry of Electronics and IT (MeitY)’s Design Linked Incentive (DLI) Scheme

Aheesa Digital Innovations, a fabless semiconductor company, unveiled Vihaan-I, India’s first indigenously designed broadband networking chip, in the presence Union Minister for Electronics & IT Shri Ashwini Vaishnaw at Semicon India 2026, at Yashobhoomi, New Delhi.

Vihaan-I’s journey is tied to two of the nation’s defining dates. The chip was taped out on Republic Day, 26 January 2026, and achieved first-pass silicon success on Independence Day, 15 August 2026, validating India’s semiconductor ambitions.

“Unveiling Vihaan-I in the presence of Union Minister Shri Ashwini Vaishnaw, who is steering India's semiconductor mission, was a proud moment for everyone at Aheesa. Vihaan-1 is proof that a Viksit Bharat can use advanced technology and design it,” said Sridharan Mani, Founder and CEO, Aheesa Digital Innovations.

"With Vihaan-I, we have a working silicon designed in India, by an Indian team, for India's networks. Our focus is now on getting this chip into the hands of India's broadband and telecom equipment makers,” Saket Singh, Director & Chief Growth Officer, Aheesa Digital Innovations.

Vihaan-I is India’s first home-designed chip for broadband and fibre networks. It brings the core functions of the internet equipment found in homes and offices onto a single Indian-designed chip, built on the open-standard RISC-V architecture and powered by the indigenous VEGA processor developed by C-DAC. It serves as a Made-in-India alternative to the imported silicon that powers most of the country’s telecom and broadband networks today.

At Semicon India 2026, Shri Ashwini Vaishnaw set out the six pillars of Semicon 2.0, with chip design named as the first pillar. Vihaan-I was among the Made-in-India chips he spotlighted, a working example of the design-led, indigenous milestone the mission is built to produce, and of the Atmanirbhar Bharat vision of designing strategic technology at home. Shri Ashwini Vaishnaw on Vihaan-I: https://x.com/AshwiniVaishnaw/status/2100302059757339086

Path to commercialisation

With Vihaan-I’s silicon now validated, Aheesa is moving decisively from design to market. The company has signed partnerships across the chip’s path to deployment including a packaging MoU with Optilink Networks, which will support product development from prototyping through to packaging and the joint development of broadband customer equipment built on Vihaan-I. They have also signed a distribution partnership with The Zigma Technologies India. Aheesa is now preparing for commercialisation targeted for early 2027, and expects the Vihaan roadmap to extend across the broadband, telecom and cybersecurity domains that form its core focus.

About Aheesa

Aheesa™ is a DPIIT-recognised fabless semiconductor company headquartered in Chennai. Established in 2021, Aheesa™, develops indigenous semiconductor and networking technologies for telecom, broadband, cybersecurity, and edge computing applications, with a vision to dream beyond boundaries. Aheesa™ offerings include System-on-Chip (SoC) solutions, networking processors, broadband access technologies, firmware, operating systems, and integrated hardware-software platforms for telecom and networking infrastructure. Aheesa™ has also been recognised under the Government of India’s Design Linked Incentive (DLI) Scheme under the Semicon India program. Further, in 2026, Aheesa™ secured an investment from Tamil Nadu Infrastructure Fund Management Corporation (TNIFMC) through the Tamil Nadu Emerging Sector Seed Fund (TNESSF), reinforcing its commitment to making it happen through engineering-led execution and long-term technology capability building.

For more information, please visit:

Website: www.aheesa.com

India’s Chip Ambition Accelerates: 25 Deals Announced at SEMICON 2026 Day 2

India’s semiconductor ecosystem is rapidly transitioning from policy intent to commercial execution, with SEMICON India 2026 marking a watershed moment: 25 strategic collaborations, global participation from 52 countries, and five semiconductor projects already in commercial production. This positions India as a credible global hub for chip manufacturing, design, and supply chain resilience.

On the occasion, the Union Minister, Ashwini Vaishnaw, unveiled India’s first indigenous System‑on‑Module — IndieSemiC’s ISC VegaSOM — which combines C‑DAC’s Vega‑Thejas32 processor with IndieSemiC’s globally certified LoRa‑RF module.

Developed under C‑DAC’s Industry Support Centre initiative, this breakthrough marks a pivotal step in India’s semiconductor journey. It showcases how Indian design firms, empowered by the DLI program, are not only innovating but successfully delivering market‑ready products. With chips now integrated into final applications, India is steadily transforming into a true product nation.

Key Highlights from SEMICON India 2026

• 25 Strategic Announcements: Covering semiconductor manufacturing, advanced packaging, logistics, chip design, power electronics, and workforce development.
• Global Participation: Over 600 exhibitors (300 international), 12,000+ visitors on Day 1, and delegations from Japan, Singapore, South Korea, Netherlands, Belgium, Sweden, Malaysia, and the U.S.
• Commercial Production: Five semiconductor projects already operational, exporting products globally.
• Policy Push – ISM 2.0: Backed by ₹1,000 crore allocation in Union Budget 2026–27, focusing on equipment manufacturing, advanced nodes (3nm, 2nm), and supply chain fortification.

Major Collaborations Announced

• Tata Electronics: Partnerships with INOX Air Products (high-purity gases), Sumitomo Chemical (wet chemicals), Kelington Engineering (fab readiness), and Enomoto (advanced packaging).
• L&T Semiconductor Technologies: Deals with Virtual Forest (power electronics), Newen Systems (SiC modules), Fimer India (IGBTs), and Tata Electronics (consumer-grade camera modules).
• C-MET & Hindalco: Scaling indigenous raw materials for supply chain resilience.
• India Deep Tech Alliance (IDTA): Reported $263 million investments across 56 deep-tech firms.
• NIELIT Collaborations: With Siemens EDA, Tata Electronics, Singapore Polytechnic, and SEMI University to strengthen chip design education and workforce development.

Strategic Significance

• Supply Chain Localization: India is reducing dependence on imports by localizing gases, chemicals, and packaging.
• Sustainability Focus: Water recycling in fabs and closed-loop cooling in data centres highlight India’s push for resource-efficient infrastructure.
• Global Confidence: ASML and other toolmakers showcased next-gen lithography and wafer inspection solutions tailored for Indian fabs.
• Talent Development: ISM 2.0 aims to train 100,000 semiconductor engineers in five years, with cleanroom centres in Bengaluru, Noida, and Hyderabad.

India’s Semiconductor Opportunity

• Market Growth: India’s semiconductor market projected to reach $100–110 billion by 2030.
• Global Capability Centres: India hosts 7% of GCCs in semiconductors and employs 20% of the global chip design workforce.
• Strategic Goal: By 2029, India aims to design and manufacture chips for 70–75% of domestic applications, moving toward global leadership by 2035.

SEMICON India 2026, underway at Yashobhoomi in New Delhi until September 19, brings together over 600 companies and is projected to draw nearly 50,000 visitors. The event hosts representatives from 52 nations, more than 400 senior executives, and over 150 speakers. Showcasing global collaboration, the exhibition features six Country Pavilions — Japan, South Korea, Malaysia, the Netherlands, Singapore, and Sweden — alongside 12 State booths, a Startup Pavilion, Innovation Showcase, Student Hackathon, and a dedicated Workforce Development Pavilion.

L&T Semiconductor and Tata Electronics Forge Strategic Alliance to Boost Indigenous Chip Manufacturing for Global Markets

Collaboration enables industrialisation and domestic manufacturing of India-designed chips to enhance time-to-market, reliability and supply chain resilience

L&T Semiconductor Technologies Limited (LTSCT), a leading Indian fabless semiconductor company, and Tata Electronics, a pioneering leader in India’s electronics and semiconductor manufacturing sector, announced a strategic partnership to expand indigenous manufacturing of market-leading chip products in India to serve global customers. The alliance aims to build indigenous design and manufacturing capabilities to support next-generation products across automotive, industrial, communications, security and intelligent-edge sectors.

The partnership brings together L&T Semiconductor’s fabless design innovation with Tata Electronics’ semiconductor packaging and foundry capabilities to advance domestic chip manufacturing. Both the companies will jointly explore chip fabrication and packaging opportunities for L&T Semiconductor’s current and future products across Tata Electronics’ range of fab process technologies and packaging solutions. The collaboration will also include chip design to fabrication optimisations with a focus on ensuring efficient manufacturing at scale.

“Semiconductor leadership will increasingly be defined not just by design breakthroughs but by the ability to industrialise those designs through advanced packaging and manufacturing. At LTSCT, we see this as India’s opportunity to move up the value chain. Our engagement with Tata Electronics is a decisive step in building those capabilities, ensuring that the next generation of semiconductor products can be designed in India and delivered to global markets with speed, reliability and scale”, said Dr Sandeep Kumar, Chief Executive, L&T Semiconductor Technologies Limited.

“Tata Electronics is establishing world-class semiconductor manufacturing capabilities in India to provide trusted, high-quality solutions across the semiconductor value chain to our domestic and global customers. Our partnership with LTSCT is a significant step which will accelerate India’s vision of becoming a full-stack semiconductor nation, by combining L&T Semiconductor’s deep fabless design and engineering expertise with our capabilities across semiconductor manufacturing, packaging and testing”, said Dr Randhir Thakur, CEO & MD, Tata Electronics.

The partnership aligns with Government of India’s vision to “Manufacture in India – for India and for the World”, reflecting a long-term commitment to Semicon 2.0’s focus on domestic ecosystem development and value addition, to position India as a leader in the global semiconductor industry. Together, LTSCT and Tata Electronics aim to advance packaging technologies, manufacturing excellence and quality systems that reinforce India’s semiconductor mission.

About L&T Semiconductor Technologies Limited (LTSCT)

L&T Semiconductor Technologies Ltd (LTSCT), a wholly-owned subsidiary of L&T, is the first major semiconductor products company in India. As a fabless enterprise, LTSCT focusses on designing and delivering smart devices for global customers. The company provides semiconductor devices and technology partnerships, assisting customers in achieving energy-efficient, high-performance systems that capitalise on data, electrification and software-defined technology trends.

LTSCT aims to establish an India-based semiconductor portfolio of smart devices across:

• Power
• Compute
• Analog/Mixed Signal
• IoT modules
• RF products

Supporting automotive, industrial, energy, data center and telecommunications verticals. The company operates in four key regions: the US, Europe, Japan and India, with offices located in Austin, Munich, Tokyo, Bengaluru and Noida.

For more: https://www.ltsct.com/about-us/

About Tata Electronics Private Limited

Tata Electronics Private Limited is a prominent global player in the electronics manufacturing industry, with strong capabilities in:

• Electronics Manufacturing Services
• Semiconductor Assembly & Test
• Semiconductor Foundry
• Design Services

Established in 2020 as a greenfield venture of the Tata Group, the company aims to serve global customers through integrated offerings across a trusted electronics and semiconductor value chain. With a rapidly growing workforce, the company has significant operations in India in Gujarat, Assam, Tamil Nadu and Karnataka, in addition to overseas offices in US, Taiwan and Singapore.

Tata Electronics is committed to creating a socio-economic footprint by employing many women in its workforce and actively supporting local communities through environmental, education, healthcare, sports and livelihood initiatives.

For more: www.tataelectronics.com

Tata Electronics and Nexperia Forge Semiconductor Alliance to Drive Innovation and Supply Chain Resilience

Nexperia and Tata Electronics have entered into a wide-ranging partnership covering wafer fabrication, assembly and testing, technology collaboration, and innovation. This alliance sets the stage for long-term cooperation across the semiconductor value chain, supporting both companies’ growth ambitions while advancing India’s role as a globally competitive hub.

Nexperia is a Netherlands headquartered global semiconductor company, known for producing essential components that power virtually every electronic design worldwide. It ships over 100 billion units annually and plays a critical role in automotive, industrial, consumer, and mobile applications.

Through their front‑end manufacturing collaboration, Nexperia and Tata Electronics are preparing to produce Nexperia’s MOSFET portfolio at Tata’s upcoming 300mm semiconductor Fab in Dholera, Gujarat.

Nexperia is a cornerstone of the global semiconductor industry, combining European engineering heritage with worldwide manufacturing capacity. Its partnership with Tata Electronics leverages this expertise to strengthen India’s semiconductor ecosystem.

🗣️ Leadership Perspectives

• Achim Kempe, COO, Nexperia: “This collaboration goes beyond manufacturing. By combining Nexperia’s semiconductor expertise with Tata Electronics’ expanding capabilities, we are building a long-term partnership that drives innovation, growth, and supply resilience.”
• Dr. Randhir Thakur, CEO & MD, Tata Electronics: “We are delighted to partner with Nexperia to manufacture their products at our facilities in Dholera and Jagiroad. This comprehensive partnership represents a major step in building a globally competitive semiconductor ecosystem in India.”
• Stefan Tilger, Interim CEO, Nexperia: “Our collaboration with Tata Electronics merges complementary strengths in technology, manufacturing, and innovation, reinforcing our commitment to a resilient and globally balanced network.”

Strategic Importance

• India’s Semiconductor Leap: Tata Electronics is investing USD 14 billion to establish India’s first commercial 300mm Fab in Dholera, Gujarat and an indigenous assembly and test facility in Jagiroad, Assam.
• Global Supply Chain Resilience: The alliance diversifies production and strengthens supply chain flexibility.
• EU–India Cooperation: Aligns with growing technology and trade ties between India and the European Union.

Partnership Scope Overview

Focus Area	Details	Impact
Front-end Wafer Fabrication	Production of Nexperia’s MOSFET portfolio at Dholera Fab	Anchors India’s semiconductor manufacturing
Back-end Assembly & Test	Jagiroad, Assam packaging facility	Strengthens indigenous back-end capability
Technology Development	Joint R&D and innovation initiatives	Accelerates ecosystem growth

Industry Impact

• Global Demand Alignment: Addresses rising semiconductor needs in automotive, industrial, consumer, energy, communications, and infrastructure sectors.
• India’s Positioning: Reinforces India’s emergence as a semiconductor hub within the global value chain.
• Customer Benefits: Ensures scalable production pathways and resilient supply chains for Nexperia’s global customers.

About the Companies

• Nexperia: Netherlands-based, shipping over 100 billion products annually, specializing in discrete, power, and analog semiconductors.
• Tata Electronics: Established in 2020, with operations across Gujarat, Assam, Tamil Nadu, and Karnataka, plus offices in the US, Taiwan, and Singapore.

 In summary: This $14 billion partnership combines Nexperia’s global expertise with Tata Electronics’ manufacturing ambitions, creating a resilient, innovation-driven semiconductor ecosystem in India.

Modi Rallies CEOs for India’s Chip Future

Prime Minister Narendra Modi chaired a high‑level Semiconductor Roundtable with global CEOs at Seva Teerth, underscoring India’s ambition to become a frontrunner in emerging technologies.

The meeting, held on 16 September 2026, brought together leaders from companies including SEMI, Micron, Infineon, Applied Materials, ASML, Merck, Tokyo Electron Ltd, FujiFilm, AMD, Intel, Tata Electronics, Lam Research, Rapidus, NXP, Foxconn, Semi Conductor Devices, Advantest, Celesta Capital, CG Power, IBM Reserach among others.

Prime Minister Modi urged industry leaders to contribute ideas on policy and administration, assuring their feedback would shape future reforms. He called on them to play an active role in driving the next phase of India’s semiconductor expansion

Key Highlights from the Roundtable

• Government–Industry Collaboration: The Prime Minister emphasized the need for close cooperation between policymakers and industry leaders to shape India’s technology future. He highlighted India’s strong foundation in talent, infrastructure, and technology adoption.
• Emerging Technologies: Modi urged India to aspire to be among the early leaders in areas like Artificial Intelligence and Quantum Computing. He referenced the ambitious target of training one crore people in AI, noting that India’s talent pool combined with global expertise could unlock vast opportunities.
• Policy Environment: Reiterating the government’s commitment to a predictable and responsive policy framework, the Prime Minister invited CEOs to share suggestions on administrative and policy measures. He assured that industry inputs would be given due consideration.
• Industry Confidence: CEOs praised the government’s sustained efforts under ISM 2.0, expressing confidence in India’s ability to build capabilities across the semiconductor value chain — from manufacturing and R&D to advanced technologies and supporting industries.

Industry Response

The CEOs acknowledged the progress India has made in manufacturing, design, infrastructure, and talent development, and committed to contributing to India’s emergence as a globally competitive semiconductor hub. They noted that recent achievements have created a strong foundation for deeper industry participation.

Strategic Significance

This roundtable marks a shift from foundational efforts to scaling opportunities, positioning India as a serious contender in the global semiconductor race. With strong government backing, industry confidence, and a vast talent pool, India is setting the stage to become a hub for next‑generation technologies.

India’s Izmo Microsystems Ignites Quantum Leap in Semiconductor Packaging

Izmo Microsystems has entered full-scale production of advanced quantum and RF photonics modules in India, marking a major milestone in indigenous semiconductor packaging.

At SEMICON India 2026, the company showcased production-ready quantum modules including a Quantum Random Number Generator and Quantum Key Distribution systems, alongside defence-grade RF packages operating at 40 GHz.

The showcase underscores Izmo Microsystems’ pioneering role as India’s first company to master the specialized packaging of photonic integrated circuits into fully functional modules—a capability long confined to overseas facilities. By uniting package design, precision assembly, and manufacturing within a single ecosystem, Izmo provides end-to-end support, guiding customers seamlessly from early prototyping through to large-scale commercial production.

Key Announcements from Izmo Microsystems

• Quantum Random Number Generator
  Production-stage module designed for secure cryptographic applications.
• Quantum Key Distribution (QKD) module
  Packaged for Pramatra, enabling quantum-secure communications.
• Thin-Film Lithium Niobate Modulator
  Packaged for CCRAFT, supporting advanced optical systems.
• 40 GHz RF Semiconductor Package
  Indigenous Quad Flat No-Lead (QFN) package for defence and secure wireless communication, now in production shipments.
• Optical Transceiver Portfolio
  Previewed for commercial launch in 2027, targeting AI clusters and hyperscaler cloud infrastructure.

Strategic Importance

Module	Application	Status
Quantum RNG	Cryptography, secure systems	In production
QKD module	Defence, telecom, enterprise security	In production
LiNbO₃ modulator	Optical communication	In production
40 GHz RF package	Radar, EW, secure comms	Production shipments
Optical transceivers	AI, HPC, cloud	Launch in 2027

Why This Matters for India

• First Indian company
  to achieve specialized photonic packaging, historically outsourced abroad.
• Supports Atmanirbhar Bharat
  by indigenizing critical semiconductor technologies.
• Strengthens defence electronics
  and secure communications supply chains.
• Aligns with Semicon 2.0 policy
  (₹1,27,500 crore outlay) to boost ATMP/OSAT and advanced packaging.

Risks & Challenges

• Scaling production
  Maintaining yields and reliability at 40 GHz and quantum-grade modules is technically demanding.
• Global competition
  US, EU, and China are investing heavily in photonics and quantum packaging.
• Supply chain resilience
  Indigenous capability reduces dependency but requires sustained investment in materials and skilled workforce.

HCLTech Launches ₹185 Crore, 40,000 Sq. Ft. Advanced Semiconductor Lab in Bengaluru

HCLTech has inaugurated a ₹185 crore, 40,000 sq ft Advanced Semiconductor Lab in Bengaluru, a milestone in India’s push to become a global semiconductor hub.

The facility includes 25,000 sq ft of Class 10K and Class 1K cleanrooms, enabling post-silicon engineering, advanced testing, and failure analysis. For an uninitiated, Class 10K and Class 1K cleanrooms are controlled environments defined by the maximum number of airborne particles allowed per cubic foot of air. Class 1K is significantly cleaner than Class 10K, making it suitable for more sensitive semiconductor processes.

This lab strengthens India’s semiconductor ecosystem by bridging the critical gap between design and production, ensuring chips are validated, qualified, and ready for deployment across industries such as consumer electronics, aerospace, defence, and medical devices.

The Bengaluru facility features state‑of‑the‑art equipment from Teradyne, Advantest, Keysight, Tektronix, and Thermo Fisher Scientific Inc., enabling advanced research, pre‑production validation, and production qualification. This setup ensures faster turnaround, higher quality, and reduced complexity for global semiconductor customers.

Built around HCLTech’s Spec2Parts business model, the lab offers a unified platform for electrical validation, automated testing, qualification, and failure analysis. By integrating these processes, it streamlines the path from design specifications to finished semiconductor parts, accelerating innovation and strengthening India’s role in the global chip ecosystem.

India’s Semiconductor Growth Story

India’s semiconductor market is projected to reach $200 billion by 2035, driven by government incentives under the Semicon 2.0 programme (₹1.27 lakh crore). The programme supports fabs, ATMP (assembly, testing, marking, packaging), design, and materials, positioning India as a competitive player alongside Taiwan, South Korea, and the US.

Other Major Semiconductor Projects in India

Project	Location	Investment	Focus
Micron ATMP	Sanand, Gujarat	₹22,500 crore	Memory chip packaging & testing
Tata Electronics Fab	Dholera, Gujarat	₹91,526 crore	28nm–110nm chip fabrication (with Taiwan’s PSMC)
Vedanta-Foxconn (paused)	Gujarat	₹1.5 lakh crore (proposed)	Fab + packaging (currently stalled)
Suchi Semicon OSAT	Surat, Gujarat	₹3,936 crore	Discrete semiconductors
Crystal Matrix Fab	Dholera, Gujarat	₹3,936 crore	Mini/Micro-LED (GaN) displays

Comparative Context

Factor	HCLTech Bengaluru Lab	Other India Semiconductor Projects
Investment	₹185 crore	Micron (₹22,500 crore, Gujarat); Tata Electronics (Tamil Nadu)
Technology	Post-silicon engineering, testing, failure analysis	Fab units, ATMP facilities
Output	Validation, qualification, failure analysis	Memory chips, compound semiconductors
Global Partners	Teradyne, Advantest, Keysight, Tektronix, Thermo Fisher	Micron (US), Vedanta (Foxconn earlier)
Location	Bengaluru, Karnataka	Gujarat, Tamil Nadu, Odisha, UP

Strategic Importance

• Reduces import dependence on chips and display technologies.
• Strengthens Atmanirbhar Bharat by building domestic semiconductor capacity.
• Boosts AI, defence, telecom, and consumer electronics sectors.
• Positions India as a global hub in semiconductors by 2030.

Risks & Challenges

• Execution delays: Certification and scaling operations may face hurdles.
• Global competition: India must catch up with advanced hubs like Taiwan and South Korea.
• Supply chain volatility: Geopolitical tensions could disrupt progress.

DLI Scheme-backed Aheesa, Zigma Partner to Take Indigenous VIHAAN‑I Chip Nationwide

Aheesa Digital Innovations (Aheesa), a fabless semiconductor company, and The Zigma Technologies India (P) Limited (Zigma), an Indian technology, software, and e-governance services company, both headquartered in Chennai, have entered into a partnership with Zigma as the distribution partner to take VIHAAN-I, a first-of-its-kind indigenous networking chip, to market across India. Signed in the nation's financial capital Mumbai, this agreement brings together Aheesa's design capability with Zigma's to carry indigenous silicon to the market across India and beyond.

The partnership comes after Aheesa’s successful VIHAAN-I tape-out on Republic Day (January 2026) and first-pass silicon success on Independence Day (August 2026), achieved on its very first attempt. This chip will help reduce dependence on imported networking silicon and to support locally manufactured broadband devices. Taking a chip like this into the country's networks calls for a partner already embedded in the systems, and Zigma has spent close to three decades in precisely that terrain, delivering technology and e-governance infrastructure to OEMs, ODMs and government departments nationwide.

The chip will now proceed towards production, targeted for 2027, a significant milestone in India's efforts to build a homegrown semiconductor ecosystem, closely aligned with the Government of India’s Digital India and Atmanirbhar Bharat initiatives.

"This is a defining decade for India's semiconductor story, as we move from technology consumption to technology creation," said Sridharan Mani, Founder and CEO, Aheesa Digital Innovations. "At Aheesa, we dream beyond boundaries — building the capabilities, scale and industry that will shape India's semiconductor future. It is our vision to see Indian-designed chips serving both domestic and global markets. The partnership with Zigma brings together two companies with complementary strengths and a shared ambition for a Viksit Bharat."

For close to three decades, The Zigma Technologies India (P) Limited has been a trusted partner to government departments, OEMs and ODMs across India, turning technology into working infrastructure at national scale. Its work spans software, IT infrastructure, hardware and e-governance, alongside its own platforms and products, the foundation on which it now helps bring indigenous silicon to market.

"Zigma has worked at the intersection of technology and public infrastructure, building the systems that carry India's digital services to its people," said Raja Kathiravan, Managing Director, The Zigma Technologies India (P) Limited. "Indigenous silicon is the natural next layer of that infrastructure. In VIHAAN-I, we saw a homegrown broadband chip we could take straight into the systems we help build and in Aheesa, a partner who shares our conviction about what Indian engineering can achieve. Together, we intend to put Indian silicon at the heart of the country's digital backbone."

Aheesa's work spans indigenous semiconductor and networking technologies across telecom, broadband, cybersecurity and edge computing. This partnership now reflects the wider momentum in India's semiconductor design ecosystem, now scaling under Semicon 2.0 — the ₹1,27,500 crore programme approved in July 2026 to build a globally competitive supply chain across chip design, manufacturing, packaging and materials. As indigenous designs move from validation towards commercial adoption, it is partnerships like this, pairing Indian chip design with the reach to deploy it, that will help define how homegrown silicon scales.

VIHAAN: India’s Homegrown Broadband Chip Tapes Out for 2027 Production

VIHAAN Chip (Image ~ www.aheesa.com) 

Chennai-based Aheesa Digital Innovations has achieved first-pass silicon success with its indigenous broadband networking chip ‘VIHAAN’, built using India’s VEGA microprocessor. The milestone, backed by the Design Linked Incentive (DLI) Scheme, positions VIHAAN for production tape-out in 2027 and strengthens India’s domestic semiconductor ecosystem.

The Design Linked Incentive (DLI) Scheme is empowering Indian startups to design semiconductors for diverse strategic and commercial uses. Applications span satellite communications, drones, surveillance systems, defence and aerospace platforms, automotive electronics, IoT devices, LED drivers, AI solutions, telecom infrastructure, and smart meters.

Aheesa Digital Innovations, an Indian fabless semiconductor startup, develops chips for broadband networking and security. Its flagship SoC ‘VIHAAN’, purpose‑built for fibre broadband, was taped out on Republic Day and achieved first‑pass silicon success on Independence Day 2026. The chip now advances toward production tape‑out, targeted for 2027.

Key Highlights

• Startup: Aheesa Digital Innovations (Chennai-based, fabless semiconductor firm)
• Chip: VIHAAN – broadband networking System-on-Chip (SoC)
• Processor Core: Built on VEGA microprocessor (RISC-V architecture, developed by C-DAC under MeitY)
• Milestone: Taped out on Republic Day 2026, achieved first-pass silicon success on Independence Day 2026
• Target: Production tape-out scheduled for 2027
• Funding: Raised ₹40 crore earlier in 2026 from TNIFMC via TNESSF and private investors
• Applications: Designed for fiber broadband networks, enabling last-mile connectivity for homes and offices

Technical & Strategic Significance

Feature	Details
Architecture	RISC-V based VEGA processor core
Process Node	28nm broadband networking SoC
Functions	Integrates compute, broadband access, and system control
Target Use	Optical fiber access networks, telecom operators
Strategic Value	Reduces reliance on foreign chip designs; supports Atmanirbhar Bharat goals
Ecosystem Impact	Part of >30 chip tape-outs under DLI Scheme; contributes to India’s $100M+ VC-backed semiconductor design growth

Broader Context

• DLI Scheme Impact: Over 30 chip design tape-outs achieved across foundries; startups raised $100M+ venture capital
• Government Support: Chip-design tools provided to 455 organizations (350 academic institutions + 105 startups)
• C2S Programme: 245 chip designs taped out by 71 academic institutions, building skilled manpower for India’s semiconductor future

Challenges & Trade-offs

• Production Timeline: Commercial rollout only expected post-2027, leaving a gap before market adoption
• Global Competition: Competing against established players (ARM, Intel, Broadcom) with mature ecosystems
• Scaling Risks: Transition from prototype to mass production requires robust fabrication partnerships and supply chain resilience

Takeaway

The VIHAAN chip marks a strategic leap for India’s semiconductor ambitions. By combining indigenous design (VEGA) with government-backed funding (DLI Scheme), Aheesa Digital Innovations is helping India reduce dependence on foreign chipmakers and strengthen its digital infrastructure for broadband and 5G expansion.

PM Modi Lays Foundation for South India’s First Semiconductor OSAT Facility in Visakhapatnam

ASIP Ground Breaking Ceremony of ASIP  Technologies in Vishakhapatnam

Prime Minister Shri. Narendra Modi today virtually laid the foundation stone and unveiled the plaque for ASIP Technologies semiconductor manufacturing facility at Tarluvada, Visakhapatnam. The ₹2,500 crore Outsourced Semiconductor Assembly and Test (OSAT) project is Andhra Pradesh's and South India's first semiconductor manufacturing facility approved under the India Semiconductor Mission (ISM 1.0).

Shri. N. Chandrababu Naidu, Hon’ble Chief Minister of Andhra Pradesh joined the Prime Minister virtually for the foundation stone ceremony.

Mr. Amitesh Kumar Sinha, CEO, ISM, Govt. of India, Mr. Bhaskar Katamneni IAS, Secretary, IT, Electronics & Communication, Govt. of Andhra Pradesh, Mr. Mallavarapu Surya Teja, IAS, Special Secretary, ITE & C, Govt of Andhra Pradesh were present at the ceremony along with senior government officials, industry leaders and global partners.

The 30-acre facility, established with an initial investment of over ₹460 crore in partnership with APACT Co., South Korea, as its technology partner, will have an annual production capacity of 96 million chips. It will serve high-growth sectors, including artificial intelligence (AI), high-performance computing, data centres, and high-speed communications.

ASIP also plans to expand the facility with an additional investment of over ₹2,000 crore to further scale up its advanced semiconductor packaging operations.

The project is expected to create over 1,000 direct high-skilled jobs and 1,600 indirect jobs.

Once operational, ASIP will commence production with wire-bond and Flip-Chip Ball Grid Array (BGA) packaging technologies, followed by the introduction of advanced 2.5D and 3D packaging capabilities within two to three years.

Prime Minister Shri. Narendra Modi in his address commended Andhra Pradesh’s IT talent pool in software. Now, with the groundbreaking of the semiconductor manufacturing facility, the state is well-poised to lead in the semiconductor manufacturing sector, and the government is committed to backing this emerging manufacturing growth story which is an important part of the Viksit Bharat mission. “

Mr. Amitesh Kumar Sinha, CEO, ISM, Govt. of India applauded ASIP breaking ground today, citing it as an important contribution and step forward to further India’s semiconductor mission, bringing advance semiconductor packaging facility in Vishakapatanam, Andhra Pradesh, he reaffirmed the ISM commitment to provide all the support through growth driven industry policies.

Mr. Venkata Simhadri, Managing Director and CEO of ASIP said "The groundbreaking of our Visakhapatnam facility marks a significant milestone for ASIP and our commitment to strengthening India's semiconductor manufacturing capabilities.

We thank the Government of India, MeitY, the India Semiconductor Mission (ISM), and the Government of Andhra Pradesh for their support and confidence in this project. Together with our partner APACT, we are establishing advanced assembly, packaging and testing capabilities in India, while driving skill development, supply chain localisation, and contributing to the growth of Andhra Pradesh's semiconductor ecosystem."

Mr. Seong Dong Lee, CEO, President of APACT said: "The semiconductor industry is increasingly looking for resilient and diversified supply chains. Our partnership with ASIP combines Korean technology expertise with India's engineering talent and manufacturing ambition. We believe this facility will become an important part of India’s Semiconductor Mission and the global semiconductor ecosystem, providing advanced packaging and testing solutions to customers globally.”

India currently imports virtually all semiconductor chips used in its electronics industry. This OSAT facility addresses a critical gap in the country's semiconductor value chain, where packaging and testing account for roughly 30% to 40% of a chip's manufacturing cost.

The company expects to localize a significant portion of its supply chain over the next three to five years while building partnerships with academic institutions, including IIT Tirupati and IIT Hyderabad. The facility will also include an in-house semiconductor training center aimed at developing a skilled workforce for India's growing semiconductor sector.

Sustainability features such as solar power generation and water recycling systems will be integrated into the project, with the goal of establishing a high-standard, environmentally responsible manufacturing operation.

About ASIP: ASIP (Advanced System in Package Technologies) is a semiconductor packaging and testing company dedicated to establishing world-class Outsourced Semiconductor Assembly and Test (OSAT) capabilities in India. Backed by global industry expertise, advanced manufacturing technologies, and strategic international partnerships, ASIP is building a state-of-the-art semiconductor packaging and testing facility to serve leading semiconductor companies across North America, Asia, and other global markets. The company is committed to strengthening India's role in the global semiconductor value chain through advanced packaging and testing solutions, talent development, technological innovation, and sustainable industrial growth. For more information, visit www.asip-tech.com.

Intel Launches Starfire: AI‑Powered Chip to Transform Space Computing

Intel has unveiled Starfire, its first space‑grade chip built on the advanced Intel 18A process, designed to power AI workloads directly aboard satellites and spacecraft. The processor is engineered to withstand radiation, extreme temperatures, and long missions, marking Intel’s bold entry into the aerospace computing market.

Currently, most satellites and spacecraft use  radiation‑hardened processors like BAE Systems’ RAD750 and RAD5545, but newer missions are increasingly adopting commercial off‑the‑shelf (COTS) chips such as NVIDIA Jetson Orin and ARM‑based SoCs for AI workloads. NASA and Microchip are also developing next‑generation high‑performance spaceflight computing systems.

The space computing market has long relied on BAE Systems’ RAD750 and RAD5545, with Microchip developing NASA’s next‑gen processor. Starfire is Intel’s bid to disrupt this dominance.

Starfire chip was developed under Intel Government Technologies with strong alignment to U.S. defense and aerospace programs, but it is not restricted to government use alone. While U.S. manufacturing and security programs are central, Intel has signaled broader availability for international partners once qualification is complete.

Starfire is part of Pentagon‑linked initiatives like RAMP‑C and SHIP, ensuring trusted supply chains and radiation‑hardening standards. Intel has positioned Starfire for private operators who want onboard AI inference for navigation, imaging, and scientific data processing.

Starfire is designed first for U.S. government and defense applications, but Intel intends it to be a dual‑use technology — serving both national security and commercial satellite markets worldwide. Its U.S. manufacturing under the Trusted Foundry program ensures compliance with defense standards, while its AI capabilities make it attractive for global space operators.

Key Highlights of Intel’s Starfire Chip

• Space‑grade design: Built to survive radiation, thermal cycling, and 10+ year missions in orbit.
• AI acceleration: Up to 75 TOPS of performance via a three‑tile neural processing unit.
• CPU architecture: Eight cores (4 performance + 4 efficiency) on Intel’s 18A node.
• GPU integration: Four‑core Xe GPU with 64 execution units, built on Intel 3.
• Packaging: Uses Intel’s Foveros 3D stacking for compact, resilient design.
• Variants: Low‑power (10 W, up to 45 TOPS) and Performance (35 W, up to 75 TOPS).

Key Specs from Intel Starfire Datasheet

Feature	Details
CPU	8 cores (4 performance + 4 efficiency) on Intel 18A
GPU	4 Xe cores, 64 execution units (Intel 3)
NPU	3‑tile design, up to 75 TOPS
Memory	LPDDR5 / DDR5 support
Connectivity	12 PCIe Gen4 lanes
Thermal Range	−55°C to 125°C
Mission Life	10+ years

Source - Intel 

Comparison: Starfire vs Legacy Space Chips

Chip	Performance	Process Node	AI Capability	Mission Lifespan
Intel Starfire	Up to 75 TOPS	Intel 18A (CPU/NPU), Intel 3 (GPU)	Dedicated NPU for AI inference	10+ years
BAE RAD750	110–200 MHz	150–250 nm	None	Proven on Mars rovers
BAE RAD5545	Multi‑core, higher throughput	Mature node	Limited	Long‑duration missions
NASA/Microchip Next‑Gen	100× current throughput (in development)	TBD	AI‑ready	Future missions

Strategic Impact

• National Security: Aligns with U.S. government’s emphasis on space as a defense domain.
• Commercial Satellites: Enables autonomous navigation, onboard image processing, and scientific data analysis without ground reliance.
• Market Disruption: Competes with aerospace chips like BAE’s RAD750, offering modern AI capabilities.

Challenges & Risks

• Radiation qualification pending: Validation against total ionizing dose and single‑event effects still in progress.
• Yield concerns: Intel’s 18A node may face production yield issues until 2027.
• Adoption timeline: Engineering samples ship in Q3 2026, broader deployment post‑qualification.

Bottom Line

Intel’s Starfire chip represents a major leap in space computing, bringing modern AI and high‑performance processing into orbit. If radiation testing succeeds, it could redefine how satellites and spacecraft handle data, shifting from ground‑based reliance to autonomous, onboard intelligence.

Paras Semiconductors to Build India’s Next Big Chip Packaging Hub

Paras Defence’s semiconductor arm, Paras Semiconductors, will invest ₹6,200 crore to establish a greenfield OSAT (Outsourced Semiconductor Assembly and Test) facility in Madhya Pradesh’s Ujjain–Indore Corridor, marking a major boost to India’s chip packaging ecosystem. The state has allotted 50 acres of land for the project, which will focus on advanced packaging technologies and strategic applications.

In a press release filed with BSE and NSE, under SEBI Regulation 30 disclosures, Paras Semiconductors, the semiconductor arm of Paras Defence & Space Technologies Ltd., said that it has signed an MoU with the Government of Madhya Pradesh to set up a ₹6,200 crore advanced OSAT facility on 50 acres in the Ujjain–Indore Corridor.

The project aims to strengthen India’s semiconductor ecosystem, generate employment, and position Madhya Pradesh as a hub for next‑gen technologies. Leveraging expertise in optics and optronics, the company will focus on packaging and manufacturing devices for defence, sensor, and optical systems, with potential expansion into AI chips and advanced semiconductor technologies as market opportunities evolve.

This development comes within a few weeks after Adani Defence announced a ₹2,500 crore investment to establish a missile manufacturing hub in Shivpuri, Madhya Pradesh. 

Project Highlights

• Investment Size: ₹6,200 crore
• Location: Ujjain–Indore Corridor, Madhya Pradesh
• Land Allocation: 50 acres by the state government
• MoU Partners: Paras Semiconductors and MP State Electronics Development Corporation (MPSeDC)
• Announcement Date: July 22, 2026

Facility Capabilities

• Advanced Packaging: 2.5D/3D packaging, heterogeneous integration, hybrid bonding
• High-Density Solutions: Ultra-high-density fan-out packaging, chiplet integration
• Wafer-Level Processing: Wafer bumping, flip-chip assembly
• Testing & Reliability: Burn-in services, endurance screening for high-performance chips
• Applications: Defence electronics, AI compute, optical/optronic systems, sensor technologies

Commenting on the development, Munjal Sharad Shah, Managing Director, Paras Defence & Space Technologies Ltd., said: "The signing of this MoU marks a significant milestone in Paras Semiconductor's journey towards building indigenous semiconductor capabilities in India. We are honoured by the confidence and support extended by the Government of Madhya Pradesh and sincerely appreciate the state's progressive vision, industry-friendly policies and commitment to creating an enabling ecosystem for advanced manufacturing. The allocation of land on the Ujjain– Indore Corridor reflects the state's intent to foster long-term partnerships with industry. Through this investment, we look forward to contributing to Madhya Pradesh's industrial growth, creating high- value employment, nurturing a vibrant supplier ecosystem and supporting India's vision of becoming a globally competitive semiconductor manufacturing destination."

Commenting on the strategic significance of the project, Santosh Kumar, Chief Executive Officer, Paras Semiconductor, said: "The next phase of India's semiconductor journey will be defined not just by manufacturing capacity, but by the strength of the ecosystems we build around it. The Ujjain–Indore Corridor presents a unique opportunity to combine world-class infrastructure with a progressive policy environment to create a globally competitive semiconductor ecosystem. Ujjain, the sacred city of Mahakal and one of India's oldest centres of knowledge and civilisation, symbolises a remarkable convergence of heritage and the future. It is an honour for Paras Semiconductors to contribute to this transformation and be part of Madhya Pradesh's vision of building advanced semiconductor capabilities. Through this project, we aim to develop semiconductor devices for strategic applications, strengthen domestic technology capabilities and contribute to India's long-term technological self- reliance."

Strategic Importance

• Supports India Semiconductor Mission (ISM 2.0): Aligns with the Union Cabinet’s ₹1.275 lakh crore outlay
• Boosts Madhya Pradesh Semiconductor Policy 2025: Positions MP as a hub for semiconductors, electronics, AI, and data centres
• Employment Impact: Significant direct and indirect jobs in high-tech manufacturing
• Technology Expansion: Potential to move into AI chips and next-gen technologies

Risks & Challenges

• Execution Risk: Possible delays due to regulatory approvals and infrastructure readiness
• Global Competition: Competing with OSAT hubs in Taiwan, South Korea, and the US
• Supply Chain Dependencies: Reliance on raw materials and skilled workforce

Quick Comparison: OSAT Facilities in India

Facility	Investment	Location	Focus
Paras Semiconductors (Paras Defence)	₹6,200 crore	Ujjain–Indore, MP	Advanced packaging, AI chips, defence
Tata Electronics–ASML MoU	Multi-billion USD	Odisha	Lithography & packaging
3D Glass Solutions Odisha	₹1,943 crore	Bhubaneswar, Odisha	3D glass substrates, AI/defence
Micron Gujarat	$2.75 billion	Sanand, Gujarat	Memory packaging & testing

Outlook

This move by Paras Defence signals India’s aggressive expansion into semiconductor packaging, complementing fabrication projects in Gujarat and Odisha. If executed on schedule, Madhya Pradesh could emerge as a central hub for chip packaging and AI hardware, strengthening India’s position in the global semiconductor value chain.

Anthropic Eyes Samsung Partnership to Build Next-Gen AI Chips

Anthropic has entered preliminary talks with Samsung to manufacture a custom AI chip using Samsung’s advanced 2nm process, a move that could reshape the AI hardware landscape by reducing dependence on Nvidia and optimizing costs for running Claude at scale. While no design or production timeline has been finalized, the discussions highlight Anthropic’s ambition to build in-house silicon expertise and Samsung’s push to challenge TSMC in cutting-edge foundry services. 

Anthropic’s Strategic Shift

Anthropic, valued at nearly $965 billion, is exploring custom silicon as part of a broader industry trend where leading AI labs seek control over their hardware supply chains.
The company has begun defining specifications for a processor that could handle inference workloads—the computationally intensive task of running large language models like Claude—rather than training, which remains dominated by Nvidia GPUs and Google TPUs. This mirrors OpenAI’s unveiling of its Broadcom-designed “Jalapeño” inference accelerator.

The hiring of Clive Chan, a key engineer from OpenAI’s chip team, underscores Anthropic’s intent.

Chan helped design Jalapeño and brings expertise in building accelerators from the software layer up, giving Anthropic a strong foundation for its own silicon program.

Why Samsung?

Samsung’s appeal lies in both financial alignment and manufacturing capability.
The company participated in Anthropic’s $65 billion Series H round in May 2026, alongside SK Hynix and Micron, but unlike those firms, Samsung operates a foundry capable of producing advanced logic chips.

The talks focus on Samsung’s SF2 2nm process, which uses Gate-All-Around (GAA) nanosheet transistors for improved efficiency and density, and its advanced packaging technology, critical for high-bandwidth connections between logic and memory.

If successful, Anthropic would become a marquee client for Samsung Foundry, bolstering its bid to compete with TSMC, the current leader in advanced semiconductor manufacturing.

Industry Context

The move reflects a broader diversification trend in AI hardware.

Nvidia currently controls about 74% of the AI chip market, but soaring GPU costs—H100 units sell for over $30,000 each—and supply constraints are driving AI labs to explore alternatives.

Custom inference chips could reduce Anthropic’s costs by 30–50%, while ensuring more predictable access to compute capacity.

• OpenAI partnered with Broadcom for Jalapeño.
• Google continues to scale its in-house TPUs.
• Amazon offers Trainium and Inferentia chips via AWS.
• Meta is exploring custom silicon but remains in early stages.

Risks and Challenges

Despite the promise, the project remains nascent.

Anthropic has not finalized specifications, prototypes, or a manufacturing timeline.
Consulting multiple chip design firms suggests it may outsource parts of the architecture.
Even if development proceeds, production-ready chips could be years away, leaving Anthropic reliant on Nvidia, Google, and Amazon in the near term.

Implications

If Anthropic and Samsung succeed, the partnership could mark a turning point in AI infrastructure.

For Anthropic, it means greater autonomy, lower costs, and tailored performance for Claude.

For Samsung, it offers a chance to secure a high-profile AI client and strengthen its position against TSMC.

For the industry, it signals a future where AI labs own their full stack—from silicon to software—reducing reliance on external suppliers.

Sony Unveils 50MP Mobile Sensor With HDR Power

• Delivering power saving, high-image quality 4K shooting and improved night view and outdoor imaging performance

Sony Semiconductor Solutions Corporation (Sony) announced the launch of the L910, an approximately 50-effective megapixel image sensor for mobile applications that delivers 100 dB high dynamic range imaging with low power consumption.

This is one of the first LYTIA lineup with the LOFIC structure. It also features the new HDR technology along with the logic circuit technology that helps in reducing the random noise in dark areas of images. These technologies offer high-quality imaging by reducing highlight blowout in bright areas and noise in dark areas, compared to conventional products. Additionally, it also offers HDR video recording at 4K, 60 fps, while maintaining low power consumption with optimized circuit design.

In recent years, the need for camera functionality that can provide stable, high-quality imaging in various environments continues to grow along with the popularity of video production and live streaming. Consequently, image sensors require expanded dynamic range and improved power efficiency.

Therefore, the new sensor combines the expanded saturation capacity enabled by the LOFIC structure with the new HDR and circuit technology. It achieves a dynamic range of 100 dB with a single exposure, enabling imaging

with rich gradations from highlights to shadows and minimal noise. Compared to multi-exposure HDR technologies, this design help suppresses motion blur and flicker when shooting moving subjects, since the synthesizing process is not needed. Also, Sony's proprietary circuit design reduces power consumption, enabling high-quality video recording at 4K, 60 fps even when shooting in HDR.

Model name and shipment date:

Model name	Mass-production shipment date
LYTIA L910 1/1.28-type (12.49 mm diagonal) 50-effective-megapixel stacked CMOS image sensor	Summer 2026

Key Features:

1. The new HDR and circuit technologies offer 100 dB high dynamic range imaging in a single exposure

• LOFIC structure expands saturation capacity. 
• Triple Conversion Gain-HDR reduces highlight blowouts and noise.
• Ultra High Conversion Gain circuits improve efficiency.
• Reduces random noise by ~30% compared to conventional products.
• Achieves smooth gradations in high-contrast scenes.

2. Optimized circuit design delivers low power 4K video recording while maintaining high dynamic range

• Proprietary circuit design lowers sensor power consumption.
• Enables high-quality 4K video recording at 60 fps.
• Allows HDR preview on smartphone screens.

Key Specifications:

Model name		LYTIA L910
Image size		1/1.28-type (diagonal 12.49 mm)
Effective pixels		Approx. 50 megapixels
Unit cell size		1.22 µm × 1.22 µm
Color filter		Quad Bayer Coding
Frame rate (at full-pixel AF)	50 megapixels (4:3)	30 fps / 120 fps
	12.5 megapixels (4:3)	60 fps (DCG-HDR) / 60 fps (TCG-HDR w/LOFIC)
	4K2K (16:9)	60 fps (2x2 Bin, DCG-HDR)
		60 fps (2x2 Bin, TCG-HDR w/LOFIC)
	Power supply	Analog: 2.8 v/1.8 v Digital: 0.81 v Interface: 1.8 v or 1.2 v

Outer Interface:

- MIPI® C-PHY 2/3 trio, Max. 6.0 Gsps/trio
- MIPI D-PHY 2/4 lane, Max. 2.5 Gbps/lane

Japan’s Semiconductor Gas Shuts Down, China Holds the Keys

Japan’s semiconductor gas production has collapsed to zero after China halted exports of high-purity tungsten powder, cutting off supplies of tungsten hexafluoride — a critical material for advanced chipmaking. This leaves TSMC, SK Hynix, and Samsung highly exposed, with Japanese suppliers Kanto Denka and Central Glass announcing permanent shutdowns from July 1, 2026.

Tungsten-based gases in the semiconductor industry are special chemical gases made from tungsten that help build the tiny wiring inside advanced computer chips. For a common man, think of them as the “glue” or “filler” that connects microscopic parts of a chip together so your phone, laptop, or AI server can run faster and more reliably.

In short, tungsten-based gases are invisible but vital building blocks of modern electronics. Without them, chips can’t be made at the cutting-edge scale we rely on today.

What Happened

• China’s Export Ban: Beijing tightened export rules on high-purity tungsten powder, halting shipments to Japan.
• Immediate Impact: Japanese producers Kanto Denka and Central Glass cannot source raw tungsten, forcing them to cease tungsten hexafluoride production.
• Production Collapse: Japan’s output of this gas has dropped to zero.

Why Tungsten Hexafluoride Matters

• Essential Role: Used to fill nano-scale vias in advanced chips (7nm and below).
• Applications: 3D NAND, HBM, and advanced logic chips requiring precise interconnects.
• Cost Structure: 60–70% of production cost comes from tungsten powder.

Global Impact

• TSMC, Samsung, SK Hynix: All rely on Japanese suppliers for tungsten hexafluoride.
• Supply Chain Shock: With Japan out, China becomes the only large-scale producer, gaining pricing power.
• Price Surge: Chinese manufacturers’ stock prices are already rising, signaling higher costs for offshore buyers.
• Alternative Materials: Samsung has begun using molybdenum in SSD NAND; SK Hynix plans to adopt molybdenum for its 375-layer NAND.

Strategic & Economic Risks

Factor	Impact
Japan’s collapse	No domestic tungsten hexafluoride production
China’s leverage	Sole supplier, controls pricing
Memory makers	NAND & HBM supply chains disrupted
Chip costs	Rising due to scarcity
Alternatives	Molybdenum adoption underway but not yet scalable

Risks & Challenges

• Supply Chain Fragility: Overdependence on China for critical raw materials.
• Cost Inflation: Higher semiconductor prices could ripple into smartphones, AI servers, and consumer electronics.
• Transition Risks: Switching to molybdenum may cause delays in production ramp-up.
• Geopolitical Exposure: Japan’s semiconductor ecosystem weakened, while China consolidates control.

What’s Next

• Short-term shortages: Expected in NAND and HBM memory.
• China’s dominance: Will likely push global buyers to diversify supply chains.
• Material innovation: Molybdenum and cobalt adoption may accelerate to reduce reliance on tungsten.

India's Position

India is not directly hit by Japan’s collapse since it wasn’t a tungsten gas producer. However, as India builds fabs and packaging units, import costs will rise, making local material innovation critical. ISM 2.0’s emphasis on domestic material production could help India reduce dependence on China in the medium term.

India is positioning itself as a semiconductor hub but remains vulnerable in the tungsten supply chain. While Japan’s collapse in tungsten hexafluoride production exposes global chipmakers, India is not yet a producer of this critical gas. Instead, India is focusing on building fabs, packaging units, and alternative material ecosystems under the ₹76,000 crore India Semiconductor Mission.

Intel, 3DGS and Odisha Ink Landmark MoU for India’s Ist Advanced Glass Substrate Facility

Intel, 3DGS Inc. USA, and the Government of Odisha have signed a landmark $3.3 billion MoU to establish India’s first advanced semiconductor glass substrate manufacturing facility in Bhubaneswar–Khurda, positioning Odisha as a global hub for semiconductor technology. The project will generate over 1,800 direct high-skilled jobs and thousands of indirect opportunities.

Glass substrate is a thin, engineered sheet of glass that acts as the base layer on which circuits and chiplets are built.

Semiconductor glass substrate manufacturing technology refers to the use of ultra‑flat, engineered glass panels as the foundational layer (substrate) in advanced chip packaging. Unlike traditional organic laminates or silicon interposers, glass substrates offer superior electrical, thermal, and mechanical properties, enabling faster, more reliable, and denser semiconductor integration.

Key Highlights of the MoU

• Partnership: Signed between the Government of Odisha, Intel Corporation, and 3D Glass Solutions (3DGS) Inc. USA.
• Investment: Estimated at USD 3.3 billion (₹31,600 crore), one of India’s largest high-tech manufacturing investments.
• Location: Facility to be set up in the Bhubaneswar–Khurda region.
• Employment: Over 1,800 direct high-skilled jobs plus significant indirect employment in allied industries.
• Timeline: Implementation in phases over 5–6 years.

Strategic Importance

• Semiconductor Ecosystem Growth: The facility will produce advanced packaging glass core substrates and high-density interconnect substrates, critical for AI, high-performance computing, and next-gen electronics.
• Intel’s Role: Intel will provide technology know-how, process expertise, licensing, and workforce capability building.
• Government Vision: Union Minister Ashwini Vaishnaw emphasized that this MoU aligns with the India Semiconductor Mission, complementing recent partnerships with Applied Materials, Lam Research, Tokyo Electron, Merck Electronics, Tata Electronics, and ASML.

Intel's Involvement 

Intel is deeply involved in semiconductor glass substrate manufacturing as both a technology pioneer and ecosystem enabler. After more than a decade of R&D, Intel unveiled industry‑leading glass substrates in 2023, positioning them as the next leap in advanced packaging for AI, data centers, and high‑performance computing.

In MoU with Odisha, Intel is providing process expertise, design knowledge, and advanced packaging capabilities to enable the Odisha facility to manufacture glass core substrates and high‑density interconnect substrates.

In 2023, Intel announced one of the industry’s first glass substrates, enabling 10x higher interconnect density compared to organic substrates.

Glass Substrate

3DGS Involvement

3D Glass Solutions (3DGS) is the specialist technology partner in semiconductor glass substrate manufacturing. 3DGS involvement is central because it is one of the very few companies worldwide with proprietary expertise in glass core substrates and through‑glass via (TGV) technology.

3DGS is the materials backbone of this partnership. While Intel provides process scaling and ecosystem integration, 3DGS contributes the specialized substrate technology that makes advanced glass packaging possible. Together, they enable India to leapfrog into the future of semiconductor manufacturing.

Economic & Industrial Impact

• Boost to Odisha’s Economy: The project is expected to catalyze Odisha’s industrial growth, supporting its target of becoming a $500 billion economy by 2036 and $1.5 trillion by 2047.
• Cluster Development: Will attract global players, drive cluster-based industrialisation, and strengthen upstream (materials, chemicals, equipment) and downstream (electronics manufacturing, exports) sectors.
• Export Orientation: Facility will contribute to export-oriented manufacturing, enhancing India’s role in the global semiconductor supply chain.

Technical Significance

• Semiconductor Substrates: These are the base layers on which circuits are built, essential for chip performance, power efficiency, and signal transmission.
• Advanced Packaging: Glass core substrates prevent warping and enable multi-chip architectures like AI processors, while HDI substrates allow faster communication between complex chips.

Conclusion

This MoU represents a transformative milestone for India’s semiconductor ambitions. By combining Intel’s global expertise with Odisha’s industrial vision, the project will strengthen India’s domestic semiconductor ecosystem and position Odisha as a strategic global hub for advanced packaging technologies.