Showing posts with label Chip. Show all posts
Showing posts with label Chip. Show all posts

MIT Unveils Chip That Controls Infrared Light, Revolutionizing Sensors Worldwide

MIT Unveils Chip That Controls Infrared Light, Revolutionizing Sensors Worldwide

MIT scientists have built a new chip that can bend and control invisible heat‑based light (infrared) one pixel at a time. Unlike older systems that need heavy moving lenses, this chip works electronically, making devices like thermal cameras and gas detectors smaller, cheaper, and smarter. This breakthrough could change how we monitor pollution, improve defense night‑vision, and even open doors to faster computers that use light instead of electricity.

The prototype chip is built using mostly standard semiconductor manufacturing methods, making it easier to produce at scale. The design combines a special light‑controlling surface with a grid‑like wiring system similar to what’s used in display screens. Thin layers of copper and silicon heat up tiny pixels, switching them between two states — crystalline and amorphous — which changes how each pixel bends or blocks invisible infrared light. To keep signals clean, a built‑in diode ensures electricity doesn’t leak between neighboring pixels. This clever setup means the chip can be expanded to much larger arrays, paving the way for powerful new infrared devices.

What Happened

Researchers at MIT have developed a revolutionary chip that can control infrared light pixel by pixel using a phase‑change metasurface. Unlike traditional infrared systems that rely on bulky moving parts, this chip is fully electronic — making devices like thermal cameras and gas‑detection sensors smaller, faster, and smarter.

The research study, published in Nature, presents a new chip-scale technology: a two-dimensional, pixel-level addressable metasurface that can dynamically control mid‑infrared light without moving parts. It demonstrates how phase‑change materials and crossbar wiring can be combined to create programmable infrared optics, paving the way for compact, scalable thermal imaging and sensing systems.

This research marks a shift from mechanical optics to programmable light control. Just as digital cameras replaced film, programmable metasurfaces could replace bulky infrared systems. The result: lighter drones, smarter pollution monitors, and faster optical computers — all powered by nanoscale engineering.

How It Works

  • Phase‑change material: Each pixel can switch between two states (crystalline and amorphous), changing how it bends or blocks infrared light.
  • Metasurface design: A thin, engineered surface manipulates light at the nanoscale.
  • Crossbar wiring: Copper wires and doped silicon heat specific pixels, enabling precise control without electrical leakage.
  • Pixel‑level control: Instead of moving lenses, the chip electronically adjusts focus and direction of infrared light.

Why It Matters

  • Thermal cameras: Detecting heat leaks in homes, factories, and aircraft.
  • Gas detection: Spotting pollutants like methane or propane in the environment.
  • Defense imaging: Smarter night vision and surveillance systems.
  • Optical computing: Using light instead of electricity to process information faster.

Comparison

FeatureOld Infrared SystemsMIT Chip
OpticsMoving lensesNo moving parts
SizeBulkyCompact
ControlWhole surface onlyPixel‑by‑pixel
ApplicationsLimitedExpansive (thermal, gas, defense, computing)

Challenges Ahead

  • Scaling up: Current prototypes are small (6×6 pixels). Expanding to millions of pixels is the next step.
  • Durability: Materials must withstand repeated switching without wearing out.
  • Integration: Needs to fit into existing semiconductor manufacturing processes.

The Big Picture

This chip represents a shift from mechanical optics to programmable light control. Just as digital cameras replaced film, programmable infrared chips could replace bulky thermal systems. The result: lighter drones, smarter pollution monitors, and faster optical computers — all powered by nanoscale engineering.

India’s First 3D Chip Packaging Unit Launched in Odisha, Marking a Semiconductor Breakthrough

India’s First 3D Chip Packaging Unit Launched in Odisha, Marking a Semiconductor Breakthroug

India has laid the foundation stone for its first advanced 3D chip packaging unit at Info Valley, Bhubaneswar, marking a historic leap in the country’s semiconductor ambitions and positioning Odisha as a future-ready technology hub.

Key Highlights of the Project

  • Location: Info Valley, Bhubaneswar, Odisha
  • Investment: ₹1,943.53 crore (₹799 crore central support + ₹399.5 crore state support)
  • Promoter: 3D Glass Solutions Inc. (USA) via Heterogeneous Integration Packaging Solutions Pvt. Ltd.
  • Production Capacity: 70,000 glass panels annually, 50 million assembled units, 13,000 advanced 3DHI modules
  • Timeline: Commercial production by August 2028, full-scale operations by August 2030

Strategic Importance

  • National Milestone: First 3D glass substrate packaging facility in India, reducing dependence on imports
  • Odisha’s Role: Already home to India’s first compound semiconductor fabrication unit
  • Global Context: Linked to technologies from Intel, Lockheed Martin, and Applied Materials
  • Sectoral Impact: Products will power AI, high-performance computing, defence electronics, telecommunications, aerospace, and photonics

Leaders’ Statements

  • CM Mohan Charan Majhi: Called it a “historic milestone” for Odisha and India
  • Union Minister Ashwini Vaishnaw: Highlighted India’s rapid growth in electronics manufacturing; India is now the world’s second-largest mobile phone manufacturer
  • State IT Minister Dr. Mukesh Mahaling: Emphasized Odisha’s IT, AI, GCC and Semiconductor Policies 2025 and skill development initiatives

Comparative Context

FactorOdisha ProjectIndia’s Semiconductor Mission
Investment₹1,943 croreMultiple projects across states
Technology3D glass substrate packagingFab units, ATMP facilities
Output70,000 panels, 50M unitsVaries by project
Global Links3D Glass Solutions (USA)Intel, Micron, Vedanta partnerships
Timeline2028–2030Staggered across 2026–2032

Why It Matters

  • Boosts Atmanirbhar Bharat: Strengthens India’s domestic semiconductor ecosystem
  • Employment: Thousands of jobs for engineers, diploma holders, and ITI graduates
  • Odisha’s Transformation: From resource-based economy to technology-led growth centre
  • Global Demand: Bookings for plant output already in place
This project cements Odisha’s place in India’s semiconductor roadmap, aligning with the national vision of self-reliance in high-end electronics manufacturing.

Union Minister Shri Ashwini Vaishnaw congratulated the people of Odisha on the landmark initiative and appreciated the support extended by the State Government.

Highlighting the country’s progress in electronics manufacturing, Shri Vaishnaw said production in the sector has grown six-fold over the past 12 years. “India has now become the world’s second-largest mobile phone manufacturer and emerged as the leading exporter of mobile phones in 2025”, he added.

He further informed that two semiconductor projects have already been approved for Odisha under the India Semiconductor Mission, while three more electronics and semiconductor-related proposals are in the pipeline. “Discussions are also underway with major global companies, including Intel for future investments in the state,” he mentioned.

IISc Unveils Quantum-Safe Crypto Chip Powering IoT Security

IISc Unveils Quantum-Safe Crypto Chip Powering IoT Security

Researchers at the Indian Institute of Science (IISc), Bengaluru, have announced that they have developed the first compact, low-power quantum-safe crypto chip for IoT devices, using the SQIsign digital signature scheme. This breakthrough addresses the looming quantum threat while keeping energy consumption and hardware size suitable for constrained IoT systems.

Why This Matters

  • Quantum threat: Future quantum computers could break widely used cryptographic systems like RSA and ECC.
  • IoT vulnerability: Billions of IoT devices rely on lightweight cryptography, making them especially exposed.
  • Quantum-safe solution: Post-quantum cryptography (PQC) algorithms like SQIsign are designed to resist quantum attacks.

Key Features of the IISc Chip

  • Custom ASIC design: First hardware-accelerated implementation of SQIsign signatures.
  • Low power consumption: Optimized for IoT devices with limited battery and processing capacity.
  • Compact size: Suitable for embedding in sensors, wearables, and industrial IoT nodes.
  • Efficient signature verification: Hardware acceleration reduces computational overhead compared to software-only PQC.

SQIsign Digital Signature Scheme

  • Isogeny-based cryptography: Relies on mathematical structures resistant to quantum algorithms.
  • Candidate for PQC standards: Being evaluated by global cryptographic bodies for standardization.
  • Advantages: Smaller key sizes compared to lattice-based PQC, making it more efficient for constrained devices.

Comparison: Traditional vs Quantum-Safe IoT Security

Feature Traditional Crypto (RSA/ECC) Quantum-Safe (SQIsign ASIC)
Security vs Quantum Vulnerable Resistant
Key Size Small Moderate (but optimized)
Power Consumption Low Low (hardware-accelerated)
Suitability for IoT High (today) High (future-proof)
Standardization Status Mature Under evaluation

Challenges & Risks

  • Standardization pending: PQC algorithms are still under review; widespread adoption will take time.
  • Integration hurdles: IoT manufacturers must redesign hardware/software stacks to support PQC.
  • Performance trade-offs: Even with hardware acceleration, PQC can be heavier than legacy crypto.

Outlook

  • Near-term: Pilot deployments in IoT devices, especially in critical infrastructure and healthcare.
  • Medium-term (5–10 years): Gradual replacement of RSA/ECC in IoT ecosystems.
  • Long-term: Quantum-safe chips become standard in all connected devices.

Intel Core Ultra Series 3 Arrives: First 2nm ‘Panther Lake’ Chips Push AI PCs Forward

Intel Core Ultra Series 3 Arrives: First 2nm ‘Panther Lake’ Chips Push AI PCs Forward

At CES 2026, Intel unveiled the Core Ultra Series 3, its first processors built on the Intel 18A process node. These chips, codenamed Panther Lake, mark a major milestone in Intel’s roadmap, introducing RibbonFET gate-all-around transistors and PowerVia backside power delivery to achieve significant gains in efficiency and performance. The Series 3 lineup is positioned as Intel’s flagship AI PC platform, with over 200 designs expected worldwide, and represents the company’s most ambitious step into AI-native computing.

For an uninitiated, Intel’s 18A process node is Intel’s most advanced semiconductor manufacturing technology, a 2nm‑class node that introduces two major innovations: RibbonFET (gate‑all‑around transistors) and PowerVia (backside power delivery). Together, they deliver higher performance per watt, greater transistor density, and improved scalability for AI and high‑performance computing.

An Intel® Core™ Ultra series 3 processor.
An Intel® Core™ Ultra series 3 processor. (Credit: Intel Corporation)

The processors deliver up to sixteen cores, including twelve efficiency cores, and show dramatic improvements compared to the prior Lunar Lake generation. Intel claims a sixty percent boost in multithreaded performance, seventy-seven percent faster gaming, and battery life extending up to twenty-seven hours in laptops. AI acceleration is central to the design, with up to eighty total TOPS of compute, fifty NPU TOPS, and one hundred twenty GPU TOPS through integrated Xe3 graphics. Memory support reaches ninety-five gigabytes, while maintaining full x86 compatibility for existing applications. The new Core Ultra X9 and X7 headline the range, targeting both creative professionals and gamers.

Compared to Lunar Lake, which was built on Intel 20A and focused on AI-centric V-series designs, Panther Lake represents a broader leap. It combines higher core counts, stronger GPU performance, and longer battery life, while shifting Intel’s competitive positioning against rivals like AMD and Apple, who are also advancing their own AI-focused architectures. Intel emphasized that these chips are designed and manufactured in the United States, underscoring its strategy of semiconductor independence and leadership in advanced nodes.

In essence, Core Ultra Series 3 is not just another generational upgrade—it signals Intel’s transition into the AI-first PC era, blending cutting-edge transistor engineering with practical gains in performance, efficiency, and ecosystem adoption.

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